SANTA CRUZ, Calif. Fabbrix Inc., a startup that aims to reshape IC design through the use of regular design patterns or "fabrics," has stepped into public view this week (Dec. 11) by announcing a collaboration with PDF Solutions Inc. Through a joint development project with PDF, Fabbrix hopes to further refine technology that it claims can substantially boost yields at 65 nm and below.
Fabbrix technology employs small libraries of "logic bricks" that contain regular structures built from lithography-friendly shapes. The approach, Fabbrix claims, avoids the area and performance penalties of restricted design rules (RDRs) while providing many of the same benefits. Fabbrix says the new technology can improve yields, simplify design flows, reduce transistor variability, and make resolution enhancement technology (RET) more effective.
Fabbrix was founded in 2004 by Larry Pileggi, professor of electrical and computer engineering at Carnegie Mellon University (CMU), and some of his graduate students. Pileggi is Fabbrix CTO. Veteran EDA venture capitalist Lucio Lanza, managing director of Lanza TechVentures, is chairman of the board. Mark Templeton, former CEO of Artisan Components, is listed as CEO on the Fabbrix web site but is not continuing in that position, Pileggi said.
"We recognized that the world was moving towards more regular design structures by necessity, and we had been doing research at CMU for 5 or 6 years," said Pileggi. "We were looking at the changes in design methodology that would be needed if things went to very regular structures."
Fabbrix today is running on a "fairly low budget," Pileggi said, with offices in Pittsburgh, Pa. and Los Altos, Calif. He said Fabbrix is currently working with several IDMs, has designed an embedded processor, and taped out several other blocks to test its technology against traditional standard cell implementations. The initial work has been at 65 and 45 nm, he said, although the company has done some early experimentation with 32 nm.
There aren't any negative tradeoffs, according to Pileggi. "We found that at 65 nm, we can easily meet or exceed area and performance versus standard cells," Pileggi said. "Power can be substantially better in terms of leakage, and regular structures provide much better control over line width variations."
Fabbrix solutions start by defining regular design "fabrics," or 3D seas-of-shapes that define possible circuit patterns for each mask layer. The design fabric definition minimizes variations in electrical parameters, including transistor leakage.
Logic bricks, which can be thought of as extremely large standard cells, are the building blocks of Fabbrix-based chips. Pileggi said they range from 5 to 12 input functions and might have 10 to 30 transistors. They have fixed layouts. However, Pileggi said, "it's very easy to adjust the patterns."
Fabbrix will provide design tools to derive and build the logic bricks. Otherwise, Pileggi said, everything can be implemented with commercial design flows. He noted, however, that foundries will have to define the underlying fabrics, and work with Fabbrix to collaboratively develop bricks that work in the foundry's technology for different types of applications.
PDF Solutions provides tools and services for yield optimization and learning. "They've really been characterizing people's designs for a long time," said Pileggi.
"They have all the silicon data and the technology infrastructure to understand what the patterning of a design should be. When we take the PDF technology infrastructure and add on Fabbrix methodology, I believe we can really produce designs that are superior to anything with a non-regular pattern," Pileggi said.