SAN JOSE, Calif. The Accellera standards organization approved a 1.0 draft of the Unified Power Format (UPF) as an Accellera standard at the Design and Verification (DVCon) here Thursday (Feb. 22). The focus now shifts to an attempt to converge UPF with the rival Common Power Format (CPF) developed by Cadence Design Systems.
Both UPF and CPF allow IC designers to express low-power requirements and constraints throughout the RTL-to-GDSII design flow. The UPF effort was
launched in September by companies who felt Cadence's Power Forward Initiative wasn't sufficiently open. UPF received technology donations and backing from Synopsys, Mentor Graphics, and Magma Design Automation.
CPF, meanwhile, has been turned over to the Silicon Integration Initiative's (Si2) Low Power Coalition (LPC) and was recently approved as an Si2 specification. Efforts are now underway between Si2 and Accellera to converge the two standards.
The Accellera news surfaced at a low-power panel discussion at DVCon, where panelists noted that UPF and CPF aren't very different. Michael Keating, fellow at Synopsys' Advanced Technology Group, noted that both are based on Tcl side files, an approach that preserves the original RTL code. "The similarities are greater than the differences," he said.
Gary Delp, distinguished engineer at LSI Logic and leader of the LPC's "comparison" working group, also said UPF and CPF are very close. "There are things in one that are not in the other, but there's a huge amount of common ground," he said. "Both are excellent work and both are incomplete."
Keating and Dennis Brophy, director of strategic business development at Mentor Graphics, both said their companies will support whatever emerges from the current effort to converge UPF and CPF. Pankaj Mayor, group director of business development for industry alliances at Cadence, said his company supports convergence and will do "whatever our customers ask for."