SAN JOSE, Calif. One of the problematic issues in chip-manufacturing is soaring photomask costs.
One fabless ASIC vendor, Open-Silicon Inc., has come up with a new solution by offering a multi-layer mask program that claims to deliver a 90-nm photomask for the cost of a 130-nm product. Multi-layer masks reduce total mask cost by writing multiple mask layers of the same mask grade onto one reticle.
Over the years, several large chip makers have utilized multi-layer mask technology in an effort to cut photomask costs. Open-Silicon's program gives customers a new option for cost-effective low and mid-volume ASICs, said Naveed Sherwani, president and CEO of Open-Silicon (Milpitas, Calif.).
A ''mask set'' at the 90-nm node is roughly $500,000 to $800,000. A leading-edge ''mask set'' at the 65-nm node is $1.5 million, but photomask costs will double at 45-nm, Sherwani said.
''Mask costs have received a lot of attention as a primary factor in the rising cost of ASICs,'' said Shafy Eltoukhy, vice president of manufacturing operations at Open-Silicon.
''Many companies have tried to address rising mask cost concerns by creating platforms that predefine the metal layers. Our new multi-mask layer program is the first solution that offers a cost-saving option to customers who need to differentiate their products in the market with a full-custom ASIC,'' Eltoukhy said. ''Our multi-layer mask program is particularly cost-effective for companies that need low or medium volumes at 90-nm or smaller processes nodes.''
At present, Open-Silicon uses five foundries: Samsung, SMIC, Tower, TSMC and UMC. The fabless ASIC house said ''half'' of its foundry partners will deploy its multi-layer mask technology at this point, but it did not elaborate.