An alternative is to combine a general-purpose computing engine (to execute control-type tasks) with an FPGA-based computing engine (to perform algorithmic data-processing tasks at extreme speeds). There are already a variety of intellectual property (IP) cores available for implementing fixed-point and floating-point hardware accelerators in FPGAs. Thus far, however, little work has been performed with regard to implementing equivalent cores that work with decimal data.
At the time of this writing, computational finance is a humongous, largely untapped market. That situation is poised to change, but several pieces must fall into place if the evolution is to occur:
• a standard for decimal arithmetic;
• an appropriate hardware platform;
• a tool chain for application developers; and
• a decimal arithmetic IP library.
On the bright side, most of those elements are now in place.
A decimal arithmetic standard
There's an old engineering joke that goes "Standards are great--everyone should have one!" In the not-so-distant past, that was pretty much the way things were when it came to floating-point calculations. Prior to 1985, all of the major computer manufacturers (Cray, Digital Equipment, IBM, etc.) defined and implemented their own floating-point formats, including the precision and rounding schemes to be used. Even worse, different machines from the same manufacturer might support different flavors of floating-point.
In the absence of floating-point hardware, the various compilers implemented their own floating-point interpre- tations. The end result was that you could create a program in a language like C, compile and run it on the various platforms and end up with different results on each machine. Not surprisingly, that annoyed end users.
To address the problem, the IEEE created a standard for floating-point called IEEE 754. That standard defines how binary floating-point values are represented and how mathematical operations are performed on those values. Released in 1985, the standard was quickly adopted by all of the major computer manufactures and compiler developers. IEEE 754 was followed in 1987 by IEEE 854, a standard for radix-independent floating-point arithmetic, which includes decimal.
A revision to IEEE 754 (known as IEEE 754r) is in ballot. It defines a new decimal data type (and associated operations) that can be used for integer, fixed-point and floating-point decimal arithmetic. The decimal-encoded formats and arithmetic described in the 754r draft have already been implemented in the IBM System z9 (mainframe) processor and will be shipped in the IBM Power6 processor, scheduled for mid-2007.
The right hardware platform
Several companies have interesting hardware platforms available. Many are based on the concept of a motherboard sporting two of AMD's Opteron processors linked by a high-speed, low-latency HyperTransport bus. The idea is to remove one of the processors (each of which may be dual- or quad-core) and replace it with a pin-compatible FPGA card. The AMD processor executes control-type tasks, while the FPGA module performs data-processing tasks at extreme speeds. Meanwhile, the HyperTransport bus moves massive amounts of data around the system at very high speeds.