SAN JOSE, Calif. Intel Corp. will provide a peak deeper inside its upcoming 45nm Penryn processors at the Microprocessor Forum this week (May 22). Specifically, the company will detail some of the low power and media acceleration capabilities coming in the chips that will start shipping later this year.
Intel disclosed many of these features earlier this year. However, in the presentation this week it takes a deeper dive into how they work.
Intel's 45nm process alone will help shrink today's Core 2 Duo CPU designs from 143 to 107mm2. That will help make room for 50 percent larger shared L2 caches, hitting up to 12 Mbytes in quad-core processors.
The process will pave the way to frequencies in excess of 3 GHz. The chips will initially match the frequencies of existing parts but eventually deliver an expected 20 percent speed increase based on improving yields and optimized circuit designs.
In addition, Intel is building low power and media acceleration capabilities into the Penryn family to bolster notebooks and desktops respectively. "There are performance benefits particularly relevant to client computers," said Stephen Fischer, lead Penryn architect at Intel.
For notebooks Intel is creating a new low power state that could cut CPU power leakage in half compared to current sleep states. The new mode powers only a tiny sliver of memory on the CPU that holds state information, letting consumption across the die to drop nearly to zero.
Fischer claims the use of separate power planes in processors from archrival Advanced Micro Devices could add additional overhead. That's because the chips may need redundant voltage regulators. In addition, the AMD chips may require more buffering because they need to save and manage more information about the voltages, frequencies and power states of individual cores.
For media acceleration, Intel is rolling out 47 new instructions as a fourth generation of its Streaming SIMD Extensions (SSE).
One of the instructions enables a streaming load function that can boost the bandwidth between the processor and the graphics frame buffer as much as eight fold. "This could be a useful stepping stone to CPU and GPU integration," Fischer said.
As many as 14 instructions are dedicated to accelerating video. Some of the instructions handle in a single step motion estimation jobs that used to require multiple tasks. The net result is a boost of 40 percent on average for video encoding, Fischer claimed.
Other media enhancements are aimed at scientific and 3D computing or faster transcoding between vector and scalar operations.
Penryn also includes a new abstraction layer for virtualization jobs. Using a new data structure to handle state information, the chips can reduce content switching time in virtualization by 25 to 75 percent.
Fischer claims AMD's chips lack such an abstraction later. As a result its chips typically require more read and write operations for virtualization, he said.