The nanoimprint lithography business emerged in the late 1990s, with the arrival of Nanonex and Obducat. Subsequently, EV Group, MII and Suss announced tools.
More recently, Hitachi and Toshiba have moved into the arena. Hitachi is using nanoimprint within its own operations, reportedly for disk drives, sources said. Toshiba says it has shipped a few systems, mostly in Japan.
While the numbers for nanoimprint remain modest, the buzz surrounding the technology is anything but. Nanoimprint can pattern devices at feature sizes below 20 nanometers at a fraction of the cost of conventional optical lithography. Today's leading-edge 193-nm immersion scanners sell for as much as $40 million each. In contrast, a state-of-the-art nanoimprint tool may sell for up to $10 million, and most tools in the category sell for far less than that.
But nanoimprint has its share of drawbacks that have kept the technology from going mainstream. Throughput is low; some tools reportedly can process five or fewer wafers an hour, compared with 130 for some optical lithography tools. Overlay--the ability to align and process the various device layers--is another stumbling block: Because nanoimprint involves direct contact between the template and substrate, misalignment can result in unacceptable errors. And the development of 1:1 templates is expensive.
Early this decade, suppliers of nanoimprint technology were saying they would soon turn the industry upside down. One vendor predicted nanoimprint would be used for mainstream chip production at the 65-nm node.
That era, of course has arrived, and optical lithography continues to rule semiconductor fabrication. The Information Network (New Tripoli, Pa.), a market research firm, predicts the overall lithography market will grow 11 percent this year, to $7.4 billion. Nanoimprint's share will be negligible.
But the next-generation-lithography front-runners have experienced their share of problems. Immersion lithography could hit a wall at the 32-nm node; EUV has been delayed several times. That has some in the industry considering nanoimprint for the 22-nm node, arriving around 2011.
Chips for 32, 22 nm
"EUV is not ready, and e-beam is too slow," said John Doering, vice president of marketing and business development at MII (Austin, Texas). "The problems for EUV have been larger than anticipated."
NAND flash vendors, in particular, are taking a closer look at nanoimprint. Earlier this year, MII claimed to have delivered a nanoimprint lithography machine to a major memory maker for use in developing chips at 32 and 22 nm. Sources believe MII shipped its Imprio 250 machine to Toshiba for use in NAND flash process development.
The Imprio 250 is based on MII's "step and flash" nanoimprint technology. The tool enables sub-50-nm half-pitch resolution and sub-10-nm alignment.
While it's unclear whether Toshiba will use the tool in production fabs, other NAND flash vendors--reportedly including Hynix Semiconductor, IM Flash Technologies and Samsung Electronics--are expressing interest in the technology. "We're being pulled by a half-dozen semiconductor makers," Doering said.