SAN DIEGO, Calif. A panel at the Design Automation Conference held here Thursday (June 7) tried to identify the data models that need to be provided for the exchange requirements of silicon intellectual property (IP). For the most part, panelists agreed on the need for standards for IP reuse, but were short on details about taking specific steps toward that goal.
Songjoo Yoo, senior research manager at Samsung's SoC R&D Center, said that "we need a standardized approach to the transfer of IP between provider and receiver as we prepare to design today's very complex SoCs at process technologies of 45 nm and below." Such an approach would enable all to increase design reusability, which will lead to reductions in development cost, said Yoo.
John Goodenough, director of design technology at ARM, said that complex SoCs require IP from multiple sources to be integrated. "Standards for IP interoperability, such as the AMBA or OCP interconnect interfaces, help this at an architectural level and reduce overall system re-verification efforts," he said.
Echoing Yoo, Goodenough said that this level of IP reuse requires excellent communication of design intent from those who designed the IP and to those using it. "ARM supports the IP-XACT specification to facilitate such information transfer."
He called for a consistency between views or representation of IP for use at various stages within design flows, such as the software debugging environment, virtual prototype models and implementable RTL. "Standards must be extensible in order to enable SoC integrators and tools providers to differentiate themselves," Yoo said.
Serge Leef, general manager of Mentor Graphics' SoC division, said modern methods and standards need to be applied in order to make incorporation of third-party IP easier and cheaper than from-scratch development of in-house alternatives. "Effective and standards-based IP encapsulation is essential to enabling advanced tools and flows," he said.
Laurent Lestringand, IC design manager at NXP Semiconductors, said that "with convergence in the mobile industry, integration of IP and subsystems has become a far more complex activity, requiring system knowledge and flexibility." He called the IP-XACT specification a good start, but said "we still need a better alignment between IP providers and EDA vendors to fully leverage the benefits."
Pierre Bricaud, a director of SoC design at Synopsys, warned that "paper specifications are no longer adequate to communicate between the architecture, verification, hardware, and software teams." Instead, SoC designers use virtual platforms, or executable specifications, to keep teams aligned. "Initially, the executable spec is the golden model, but as the test benches mature, they become the golden model that drives consistency in hardware and software development."
"As an IC provider of designs for handsets, we know that architecting anything of value without thinking from the first day of the end system is fruitless," said Loic Le Tournelin, manager at Texas Instruments.
"The challenge is to enable a level of abstraction that allows system architecture tradeoffs to be done together with the software and hardware engineers where the software and future application is still being developed or is speculative, and the IP is also in flight," Le Tournelin said. "Once the design is more stable, this abstraction must find a reasonable way to simulate at clock rates that approach real time, while the hardware in parallel is reduced to practice."