PORTLAND, Ore. A lead-free process that lowers the cost of packaging flip-chip devices has entered volume production at IBM Corp.'s East Fishkill, N.Y., fab. As one of the first production facilities to use the technique, Controlled Collapse Chip Connection New Process (C4NP), IBM projects that it can achieve 99.7 percent yields.
IBM is among the chip makers who have signed licensing deals with packaging equipment maker Suss MicroTec AG (Munich Germany).
Flip-chip solder bumps are deposited by electroplating, which involves dipping wafers into a chemical bath, eletro-depositing the bumps, then disposing of the toxic chemicals in the bath. C4NP, which has been under development since 2004, uses a nozzle to inject molten solder into a wafer-scale mold. Bumps can then be applied to the entire wafer.
|Lead-free Controlled Collapse Chip Connection New Process fabricates bumps from a template, then adds them en masse to a wafer before dicing.|
"After filling the bump mold with solder and inspecting it to make sure we have 100 percent perfect fill, we then transfer it to the wafer in a single step," said David Seeger, head of IBM's research packaging efforts. "The wafer only sees that single step in the process, which is a much more economical way to prepare a chip package."
As chip costs plummet, the proportion of manufacturing effort associated with packaging has increased. For some chips, according to IBM, packaging costs are exceed the cost of semiconductor dice. C4MP is being touted as bringing the cost of packaging back in line with the cost of the die.
The eco-friendly technique also eliminates the need to safely dispose of electrochemical bath wastes since the entire C4NP process is performed by mechanical steps that involve no liquid chemistry.
"Electroplating uses a wasteful chemical bath. C4NP instead injects molten solder through a head that is not only less costly, but also eliminates all the waste associated with disposing of bath after it is used," said Barry Hochlowski, product offering manager C4 bump & test.
According to IBM, the C4NP process also opens up a range of chip design possibilities since current solder ingots or wire-forms can be used with the equipment supplied by Suss MicroTec.
"For EEs, this means they now have much wider flexibility in solder selection," said Barry Hochlowski of IBM's Microelectronics Division. "Unlike normal electroplating, where there are only a couple of options for the solder chemistry, the ingots and wire-forms for C4NP are available using a wide variety of lead-free materials."
C4NP permits binary, ternary and quaternary alloys and also minimizes the recurring cost of consumables. C4NP can also be used for both 200- and 300-mm wafers and wafer-handling equipment that is available form Suss Microtec.