SAN JOSE, Calif. Intel Corp. is expected to introduce major changes in its microprocessor lines, by rolling out a new interconnect architecture that replaces its current front-side bus technology.
"In 2008/9, Intel is expected to introduce the Common System Interface (CSI), a new system architecture for their microprocessors," according to David Kanter, manager and editor of a Web site called Real World Technologies.
Intel has talked about CSI in the past, but it will become a more important technology for the chip giant in the future. In its latest entry, the Web site describes CSI in detail.
"CSI is a family of interconnects that will transform Intel's entire high performance product line," Kanter said in a report. "CSI will replace the existing front-side bus and can be compared to AMD's HyperTransport."
Intel is developing the technology for good reason. "In 2004, AMD quickly gained market share with its Opteron processor, which capitalized on HyperTransport's superior system architecture and Intel's simultaneously weak product line," he said.
"However, Intel has always performed best under pressure, and in 2006 responded with the popular Core 2 Duo. The Core 2 Duo was a tremendous step forward for Intel, and has put significant pressure on AMD, especially in the server market," he said. "However, Intel is still relying on a system architecture which lags AMD's HyperTransport in critical performance areas."
According to the site, CSI is design to enable integrated memory controllers and distributed shared memory. "CSI will be used as the internal fabric for almost all future Intel systems starting with Tukwila, an Itanium processor and Nehalem, an enhanced derivative of the Core microarchitecture, slated for 2008," he said.
Unlike the front-side bus, CSI is a layered network fabric used to communicate between various agents, according to the site. "These 'agents' may be microprocessors, coprocessors, FPGAs, chipsets, or generally any device with a CSI port," according to the site.
"Initial CSI implementations in Intel's 65-nm and 45-nm high performance CMOS processes target 4.8-6.4-GT/s operation, thus providing 12-16-GB/s of bandwidth in each direction and 24-32GB/s for each link," according to the site.