Houston's Rice University and Singapore's Nanyang Technological University announced on Sept. 4 an initiative dubbed, The Institute for Sustainable Nanoelectronics, a joint effort aimed at lowering the cost and power consumption of embedded microchips using nanoscale solutions. ISNE is being funded with $2.6 million in seed money from NTU and is based at the Singapore institution.
The centerpiece of the initiative is the probabilistic CMOS (complementary metal-oxide semiconductor) chip invented by Rice researcher Krishna Palem, the architect of the ISNE initiative. PCMOS chips can tolerate nanoscale defects with a tunable numerical precision that trades off errors for lower power consumption. Last year Palem demonstrated a cell phone display, in which no appreciable difference in picture quality could be detected by the naked eye, even when the PCMOS was tuned to use five times less power than conventional embedded chips.
ISNE will capitalize on the fact that, for small screens, today's graphics chips are over-engineered, and that the brain's ability to perceive less-than-perfect images enables PCMOS and similar nanoscale technologies to harness defects and reproduce indistinguishable results at lower cost and using less power. The ISNE charter also calls for platform-independence in design methodologies, so that other nanotechnologies, such as photonics, can similarly benefit from trading off precision for lower cost and power.
Palem will direct his work with the International Network of Excellence--a team of computing experts from educational institutions such as Rice, NTU and Georgia Institute of Technology.