TOKYO Japan's Tokyo Electron Ltd. (TEL) is expanding its efforts in the emerging high-k equipment sector.
Starting Oct. 1, TEL will begin receiving orders for its new Trias High-k CVD system. The system is a
300-mm, single-wafer cluster tool designed for use in gate-stack applications at the 45-nm node and beyond.
The heart of the system consists of TEL's high-k
deposition chamber, which is used to deposit hafnium-based high-k dielectrics. Complementary to this chamber is TEL's UVRF system, a process
chamber capable of forming monolayer-scale insulators that serve as the interface between the high-k dielectric and the silicon substrate.
''These interfacial films are a critical component in the advanced gate stack, and TEL's UVRF system is unique in its ability to form electrically-sound, highly-uniform films in a production environment,'' according to TEL.