MANHASSET, N.Y. -- Semiconductors are on their last legs. At least that's the consensus of researchers who are looking for the next "big thing." What that thing will be is up for debate.
"We have reached the opportune moment in the semiconductor-technology industry when we need to get to work now to stay ahead of Moore's Law in the next ten years," said John Kelly, IBM senior vice president and director of research, opening up a recent look-ahead sponsored by the Semiconductor Industry Association.
Kelly, who is on the board of the SIA, considers 2007 the year of introduction of the nano era, at more than a billion transistors per chip. This compares to the litho era, from 1970 to 1990 (a thousand transistors per chip) and the materials-science era, from early 1990s to today (a million transistors per chip).
"We certainly can't do it alone," said Kelly while pointing out that materials-technology breakthroughs have been a staple of IBM Research.
"We need a healthy industry atmosphere of cooperation and competition among industry, universities and government laboratories in order to find a new computational element as the end of CMOS scaling approaches", said George Scalise, president of the SIA. "The real nano era is here.
One key example of this tripartite scheme of cooperation/competition is a partnership by the Semiconductor Research Corp. (SRC) and the Commerce Department's National Institute of Standards and Technology (NIST). The partnership supports research in nanoelectronics, and the aim is to find a replacement for CMOS. That chip technology has driven the world's computers for more than 30 years, but may hit its technological limits in the next decade. The plan is to demonstrate the feasibility of next-generation circuits over the next 5 to 10 years.
NIST will contribute $2.76 million to the effort, which, when combined with funds from industry, will provide close to $4 million of new research grants. The partnership, aimed to provide $18.5 million over five years, will fund a variety of high-priority research projects identified by the Nanoelectronics Research Initiative (NRI), which coordinates research in nanoelectronics among major universities across the country.
The collaboration between NIST and NRI will contribute directly to a primary goal of NRI: the development of an electronic component that can replace the conventional CMOS FET in the year 2020 and beyond.
Three major research centers established by NRI--Western Institute of Nanoelectronics (WIN); Institute for Nanoelectronic Discovery and Exploration (Index); and Southwest Academy for Nanoelectronics (SWAN)--have six companies participating: AMD; Freescale Semiconductor; IBM; Intel; Micron Technology; and Texas Instruments.
Index's mission for instance is to discover and demonstrate nanoscale computing devices for integration in simple integrated circuitry to extend Moore's Law beyond CMOS limits.
NIST researchers have a special focus on advancing the science of measurement. Their expertise helps make possible the ultra-precise engineering and manufacturing required by the most advanced current and future chip technologies. As part of the partnership with NRI, NIST staff also will contribute their expertise in numerous areas that are vital to identifying new materials for nanoelectronics.
One university hub that is very much involved in finding metrology solutions to measure nanoscale devices is the College of Nanoscale Science and Engineering (CNSE) of the University at Albany, N.Y. It has recently hired Alain C. Diebold, a Sematech Senior Fellow, who spent the past 18 years with Sematech and a globally recognized expert in metrology technology for nanoelectronics for its Nanoscale Metrology and Imaging Center.
The center was established by CNSE as a multi-million dollar comprehensive atomic-scale characterization and analysis laboratory to support advances in the development of technologies and devices for nanoelectronics, optoelectronics, sensors, and other applications that require very powerful thin-film and material analytical techniques.
Earlier, Diebold founded and co-chaired the group that wrote the first Metrology Roadmap for the International Technology Roadmap for Semiconductors.
At the recent SIA update in San Jose, Alain E. Kaloyeros, vice president and chief administrative officer of Albany's CNSE, said that the "holy grail" of finding a replacement for CMOS is to "develop a state variable that runs the device and also can be used for interconnect/wiring purposes."
In addition, the new switch would be functionally scalable through multiple computer chip nodes. According to Kaloyeros, there are four candidates for non-charge based state variables. The switching is based on an exciton, a spin, orbital symmetry and magnetic flux quantum.
The bottom line for the exotic technologies vying to displace CMOS is their scaling attributes and how these can be leveraged for the new technologies. According to IBM's Kelly: "We must focus on cost to expand the industry. Hopefully, when we flip to a new technology it will be less costly to produce [than is CMOS]."