SAN FRANCISCO, Calif. Startup Berkeley Design Automation is working on new capabilities to analyze in software analog effects in communications between die in a multi-chip package that can impact device yields. That's one of a "new category of problems not addressed by any EDA vendors today" in analog semiconductor design, according to Ravi Subramanian, chief executive and founder of BDA.
Subramanian spoke with EE Times in a recent video interview at our San Francisco studio. To date BDA has focused on being an alternative to major analog EDA suppliers such as Cadence Design Systems in the area of analog verification. The startup claims its software can verify analog blocks five to ten times faster than products from competitors.
In a separate video, Subramanian gave his five-minute elevator pitch for his startup which claims customers including Broadcom, NEC, Toshiba and Qualcomm. He said the analog content of semiconductors—which includes wireless blocks—is growing at a rate faster than the industry's growth.
Problems in analog design are typically thornier than those in digital design, he added. "It's relatively easy to get digital right but very difficult to get analog right these days," he said.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.