SAN JOSE, Calif. Japan's JSR Corp. claims that it has achieved 32-nm line and space patterns for 22-nm node semiconductor devices by using a new ''freezing material'' for double patterning.
JSR worked with IMEC in the arena. JSR (Tokyo) said that it has developed its new ''freezing material'' for the double exposure/single etch process to achieve finer pitches. Double patterning, such as double exposure/double etch or double exposure/single etch, are promising methods for processes at the 22-nm node.
''JSR's 'freezing material' is designed to prevent the first resist material from mixing into the solvent of the second resist material by hardening the surface of the first resist material,'' according to the materials supplier. ''By using this material, it may make the most wanted double patterning process achievable.''
For the 32-nm node, 193-nm immersion lithography with double-patterning is the leading candidate for mass IC production.
But at present, there are no viable lithography solutions for the 22-nm node. Double-patterning, EUV, high-index, maskless and nanoimprint are some of the choices.