There's trouble brewing in chip-making paradise. Manufacturers are rolling out 45-nm ICs, with 32-nm designs in the works; 22-nm and even smaller devices are in R&D. But delivery of chips at 32 nm and beyond won't be a cool breeze.
A new 300-mm fab runs $3 billion and process technology R&D is about $2.4 billion at each node, according to VLSI Research and other industry analysts. And these costs aren't the only potential hindrance to Moore's Law. Concerns about the foundry model are emerging, there are bottlenecks in the fabs and the IC-equipment supply chain is a mess. Rising energy costs are becoming a bone of contention in the fabs, too.
What's more, no viable lithography solutions exist beyond 32 nm. Extreme ultraviolet, maskless and nano-imprint technologies have been proposed, but none have yet delivered.
When it comes to scaling, high-k is needed for the gate stack, but there are hurdles here, too. Some say 3D chips may be required. Others believe the industry needs to move to 450-mm fabs, which is causing angst.
And let's not forget design-for-manufacturing (DFM). It's clear design costs are rising, but what are the projected yields for future devices? It's do-or-die time for DFM.
EE Times has constructed the following list of 10 fab technologies that could make or break future IC scaling. These technologies represent what we consider the biggest barriers to next-generation chip manufacturing.