SAN FRANCISOThe preliminary version of the DDR PHY Interface (DFI) specification 2.1, which defines an interface protocol between memory controller logic and PHY interfaces, has been made available on the DFI ecosystem community Web site.
The DFI specification extends support to the latest LPDDR2 memory technology and enables new features including frequency change support and low-power PHY options, according to a statement released by Denali Software Inc., one of the DFI specification participating members.
The DDR PHY Interface (DFI) specification defines an interface protocol between memory controller logic and PHY interfaces, with a goal of reducing integration costs while enabling performance and data throughput efficiency.
A collaborative technical working group including representatives from ARM, Denali, Intel, LSI, Samsung, and STMicroelectronics is enhancing the specification with several low-power features aimed at speeding LPDDR memory system design and integration, and reducing verification costs, according to Denali (Sunnyvale, Calif.).
"As the migration to LPDDR2 memory and low power continues, there is a need to meet the demand for higher density, speed and lower power," said John MacLaren, chair of DFI Technical Committee and senior staff engineer at Denali, in a statement.
"The latest DFI features will be well suited for low power and embedded system designs which target applications such as cell phones, ultra-mobile PCs and consumer applications," he added.