With process nodes and die sizes shrinking, the number of consumer products incorporating ICs with flip-chip packaging is growing. Unfortunately, flip-chip package manufacturing rules have not kept pace with shrinking process technology.
As a result, a more precise and efficient method of designing the I/O interface is needed, especially for flip-chip designs. This integrated chip-package co-design method should allow an early feasibility study and have the power to optimize the package and chip interface design while satisfying the tight constraints imposed by both the chip and the package.
Today, most companies that do flip-chip design have some internal methodology for flip-chip planning. Such methodologies mostly use spreadsheets to capture and store design inputs and constraints. Home-grown scripts are written to process the data in the spreadsheets and produce instructions to guide the design implementation. This often starts as a simple system and gradually grows into a complicated set of formats and scripts as design complexity increases.
There are several disadvantages to this type of approach. First, such systems can be expensive to maintain and can reduce designer productivity. Second, spreadsheets have huge limitations in terms of design representation. For example, a spreadsheet cannot represent a non-gridded bump layout, often a requirement in a low-cost package.
Third, scripts lack the synthesis power to perform what-if analysis and optimize the design for cost, performance and reliability. Fourth, systems based on spreadsheets and scripts lack the ability to accurately predict the final implementation of a design.