SAN JOSE, Calif. Techniques being used to extend the life of 193-nm lithography appear equally applicable to next-generation extreme ultraviolet (EUV) lithography, which could greatly increase the extendibility of the technology, according to Kurt Ronse, director of the advanced lithography program at nanoelectronics research center IMEC.
Litho-friendly layouts, the use of design-for-manufacturing technology, source-mask optimization and customized illumination techniques that are being used to push the limits of 193-nm immersion lithography still further could have the same impact on EUV, if, and when, the technology is put into production, according to Ronse.
In a paper presented at the SPIE Advanced Lithography conference detailing work done by Ronse and his team at IMEC(Leuven, Belgium), Ronse exempted double-patterning, which is being used by lithographers to extend 193-nm immersion to the 32-nm node but introduces new costs and overlay challenges.
"I don't want to assume double patterning for EUV," Ronse said. "We would like to avoid double patterning as long as possible."
EUV was originally targeted for the 65-nm node, but has been pushed out several times. In addition to the technical hurdles that have necessitated the EUV push-outs, there has been concern that the technology may not be extendible to enable continued IC scaling.
There now appears to be a consensus that EUV technology will not be ready before the 16-nm node at the earliest. EUV has been dogged by delays due to the lack of sources, resists and masks. Intel, long a proponent of EUV, sent signals earlier this week that it is not expecting EUV to be ready by the 22-nm node.
The limits of 193-nm immersion lithography for application in high volume manufacturing continue to be pushed to reduced k1, Ronse noted. But he outlined some hurdles that must be overcome to improve manufacturability, including proximity matching, lens heating compensation, improved overlay and advanced process control.