SAN JOSE, Calif. -- Expanding its efforts in 3-D chips, Applied Materials Inc. has formed a joint effort with Disco Corp. to develop wafer thinning processes for fabricating through-silicon vias (TSVs).
Combining Disco's grinding equipment with Applied's etch, dielectric deposition, physical vapor deposition and chemical mechanical planarization systems, the two companies expect to develop wafer thinning and post-thinning processes of wafers bonded to silicon and glass carriers, according to Applied (Santa Clara, Calif.) and Disco (Tokyo).
''The alliance of Applied's process integration expertise and our wafer thinning systems is great news for chip makers planning to use TSV technology,'' said Nobukazu Dejima, president of Disco Hi-Tec America Inc., in a statement. ''The capability to validate complete process flows using thinned wafers at our Santa Clara research laboratory and Applied's Maydan Technology Center gives us a unique opportunity to exploit the advantages of thinned wafers in multiple TSV integration schemes.''
Hans Stork, group vice president and chief technology officer of Applied's Silicon Systems Group, said: ''Our strategy to collaborate with Disco and other leading equipment suppliers is an innovative way of doing business that can deliver robust solutions to mitigate our customers' risk and lower the overall cost of device fabrication on ultra-thin substrates.''
Applied has taken other steps into the 3-D arena. Last year, the company unveiled its Applied Centura Silvia etch system, which is designed to enable high-performance, low-cost TSV applications.
The international EMC-3D semiconductor equipment and materials consortium recently announced that Applied Materials has joined the organization. EMC-3D or Semiconductor 3D Equipment and Materials Consortium was created in 2006 to develop and market wafer level 3-D chip stacking technology.