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3-D memory startup Schiltron seeks partners

6/1/2009 11:00 PM EDT
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toom_tabard
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re: 3-D memory startup Schiltron seeks partners
toom_tabard   6/16/2009 11:09:36 PM
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In response to the comments from "VLSI Training": When it comes to speed, it is important to keep the massive parallelism of NAND since NAND flash itself is inherently slow since string read currents are small and programming a single cell is slow. Schiltron uses read-pass overdriving which maximizes string read currents without disturb and uses tunneling for program/erase so thousands of cells can be program/erased in parallel. Regarding cost, it may be useful for "VLSI Training" to check out the recent paper from A.J. Walker from Schiltron that was published in May 2009's edition of IEEE Trans. on Semiconductor Manufacturing where a complete mathematical cost model was given for monolithic 3D memory circuits. Here, comparisons were made with 2D showing the inevitability of 3D for high density flash.

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