PARIS The end of 2009 is fast approaching, and there is no better time to assess the year's achievements and highlight priorities for the coming year, and even years. At a press conference last week in Paris, André-Jacques Auberton-Hervé, president and CEO of Soitec SA (Bernin, France), said the company has the financial resources it needs to seize market opportunities and has built its growth strategy on four pillars.
Auberton-Hervé declared: "The crisis is behind us. Forecasts have constantly improved throughout the year, and there is a sense of renewed optimism for the year 2010 with growth areas that reach again comfortable levels. The SOI technology is at the heart of this rebound."
Taking into account capital lease repayments and net proceeds from the recent convertible bond issue, the company said it has closed the first half of financial year 2009-2010 with strong cash and cash equivalents of 306 million euros at the end September 2009.
"Our interest does not lie in rare birds but rather in volume markets," noted Auberton-Hervé before enumerating the four growth directions that the SOI specialist is pursuing.
First of all, Soitec said it aims at significantly increasing image sensor sensitiveness to enhance image quality.
To materialize such intention, Soitec said it will use its Smart Stacking technology to facilitate backside illumination (BSI). It also plans to develop a new generation of 3D image sensors.
Smart Stacking technology enables wafer-to-wafer level stacking of partially or fully processed circuits. Smart Stacking was developed originally at Tracit Technologies SA, which Soitec acquired in July 2006. Tracit (Grenoble, France) was itself a spin-off from CEA-Leti.
Smart Stacking is a low-temperature industrial process that achieves wafer-level circuit stacking onto a range of starting materials. Smart Stacking can be used for the production of high pixel-count image sensors; and it will also enable a range of other photonics applications, RF circuits, and the realization of more complex 3D product architectures, Soitec claimed.
In May, Soitec and STMicroelectronics joined forces to develop 300mm wafer-level BSI technology for use in image sensors.
The deal included the licensing by Soitec to ST of its 'Smart Stacking' bonding technology for the manufacturing of backside-illumination sensors on 300mm wafers.