BURLINGAME, Calif. Intel Corp. is still exploring the future use of 3-D devices based on through-silicon vias (TSVs), but the company said that it has still not found the right application or "product intercept" for the technology.
Right now, chip makers are shipping limited 3-D devices based on TSVs, mainly CMOS image sensors, MEMS, and, to some degree, power amplifiers. But for years, IBM, Intel and others have been looking at stacking microprocessors, memory and other functions using TSV technology.
Experts define a true 3-D package as one that stacks various chips vertically and then connects them by deploying TSVs. The aim is to shorten the interconnections between the chips, reduce die sizes and boost device bandwidths.
But in processor designs, there are several stumbling blocks for TSVs, including cost, heat dissipation, standards, lack of EDA tools and others.
There are also economic issues: It is a challenge to develop a TSV-based chip that will meet market requirements for OEMs and will actually make money for chip makers themselves.
This is especially true for processor chip giant Intel, which can't afford to develop a technology for technology's sake. Like others, Intel must devise a product that can realize a return-on-investment.
Intel is still in search of the right 3-D chip application. "3-D is attractive if we can find the right product intercept," said Jerry Bautista, director of technology management at Intel (Santa Clara, Calif.), at the 3-D Architectures for Semiconductor Integration and Packaging event here. "We are still looking at the right product intercept."
For years, Intel has been looking at 3-D chip technology. In this arena, it has been exploring various 3-D stacking technologies, such as TSVs, silicon interposers and wafer bumping.
What's driving 3-D chip designs? The shift towards higher bandwidth systems will require new packaging technology, possibly including TSVs, Bautista said. At present, systems are seeing memory bandwidths between 25-to-40 GB/second.
Due to a new class of applications, memory bandwidths will need to grow tenfold beyond 2011, Bautista said. "This is a motivation why we want die stacking" based on 3-D technology, he added.