BURLINGAME, Calif. -- Struggling to bring its 3-D chip technology into the mainstream, Tezzaron Semiconductor Corp. is taking several steps to reverse its misfortunes.
As part of the moves, Tezzaron (Naperville, Ill.) has formed an alliance with SVTC Technologies Inc., an R&D foundry. Tezzaron continues to work with its original foundry partner--Chartered Semiconductor Manufacturing Pte. Ltd.--but Tezzaron is also working with three other unidentified fab partners.
Tezzaron is also readying new 3-D devices, including a 4-gigabit DRAM product. This 100-nm product is a discrete part that attaches or bonds to another part, including a processor, baseband device or others.
This in turns forms a true 3-D device with logic and memory on the same part. That scheme provides several advantages over today's embedded DRAM, based on 45-nm or other technology, said Robert Patti, chief technology officer of Tezzaron, at the 3-D Architectures for Semiconductor Integration and Packaging event here.
Tezzaron's DRAM solution is not faster or cheaper than embedded DRAM, but it provides ''an order of more bits'' than embedded DRAM with smaller geometries, he said.
For years, Tezzaron has been developing high-speed memory products, based on 3-D wafer stacking and TSV processes. Tezzaron's so-called FaStack technology is said to create 3-D chips. The heart of the process is wafer-level stacking and a tungsten process.
Device circuitry is divided into sections that are built onto separate wafers using standard processing. The wafers are then post-processed for thru-silicon interconnection, creating hundreds of thousands of vertical "Super-Via" connectors. The wafers are aligned, then bonded, thinned, and diced into individual devices.
But to date, after years' of R&D, the company has only been able to provide ''prototypes'' in the market, he said. ''It takes a huge adoption'' to bring 3-D devices into volume production.
The company had a false start by implementing copper within its designs. It has since moved to tungsten. And one of its parts, a pseudo SRAM device, is struggling to make it from the R&D stage to production.
But there is a sea of change at the company. Last year, it only had three or four customers. ''Now, we're drowned with customers,'' he said.
To propel its success, the company has taken several steps. First, it has quietly signed up SVTC for use in handling the ''backside processing'' R&D work. SVTC's goal is to bring technology from the lab to the fab.
In 2007, Singaporean foundry provider Chartered began ramping production of Tezzaron's memory chips. Since then, Tezzaron has added three more fab partners, of which it did not identify.
Chartered is said to be ramping 130-nm devices with 1.2-micron vias. One of Tezzaron's new fab partners is looking to ramp up 1-Gbit DRAM devices with 0.85-micron vias and a 1.75-micron pitch.
The DRAM product is seeing interest in the embedded market. ''3-D has found the road,'' he said. ''We found traction.''
The Intimate Memory Interconnect Standard (IMIS) being promoted by the 3D-IC Alliance last year released its official specification for 3-D stacking memory chips.
Founding members of the Alliance, Tezzaron Semiconductor and Ziptronix, Inc. (Morrisville, N.C.), are already fabricating memory chips using the IMIS port.