SAN JOSE, Calif. -- In a major departure, South Korea's Samsung Electronics Co. Ltd. is reportedly exploring an alternative in high-k dielectrics: It is looking at gate-last technology, according to sources.
Initially, Samsung plans to roll out a rival gate-first, high-k technology. As previously reported, the technology will be offered at the 32- and 28-nm nodes for foundry customers, which will be rolled out this year.
Some believe that gate-first is only a one-node solution. As a result, sources believe Samsung's foundry unit is working on a gate-last technology for 22-nm. Ana Hunter, vice president of foundry services for Samsung Semiconductor Inc., declined to comment on reports that Samsung is looking at a gate-last technology.
If the reports are true, this would be a major departure from Samsung's original position. The gate-first technology was developed and is now being touted by IBM Corp.'s ''fab club.'' IBM, Infineon, GlobalFoundries, NEC, Samsung, ST, Toshiba and others are part of IBM's technology alliance.
IBM, GlobalFoundries and Samsung are co-developing foundry processes and will roll out a gate-first, high-k offering this year. So far, though, IBM's camp, which includes Advanced Micro Devices Inc. (AMD), has not rolled out a high-k/metal-gate offering.
The camp is far behind Intel Corp., which has shipped 45- and 32-nm processors based on its gate-last, high-k technology.
Except for Intel, leading-edge chip makers are struggling to switch from today's silicon dioxide to a high-k gate insulator. Silicon dioxide as a gate dielectric is running out of gas at 45-nm, but some are pushing it to 28-nm.
But high-k has been delayed because of difficulties in developing the technology. In addition to high-k, chip makers must also move to metal gates, replacing the N and P doped polysilicon gate electrodes with metallic alloys to eliminate polysilicon depletion at the gate.
There are two basic approaches to the next-generation gate stack in logic designs. IBM's ''fab club'' is using a gate-first approach, while Intel is deploying a rival replacement-gate or gate-last technology. In a gate-first approach, the gate stack is formed before the source and drain, as in a conventional CMOS process. Replacement-gate technologies are a gate-last approach, where the gate stack is formed after source and drain.