LONDON The Open Virtual Platforms (OVP) has announced the release of free, high-speed simulation models of Virage Logic's configurable ARC processor cores.
Models of the Virage Logic ARC600 and ARC700 families of processor cores have been released, including the ARC605. Additionally, Virage Logic and Imperas have cooperated on the verification of the functionality of the models.
ARC processors are commonly used in audio and video subsystems, and in flash controllers, among other applications. The models produced by Virage Logic work with the OVP simulator, OVPsim, where they have shown performance reaching hundreds of millions of instructions per second. The models are free and available as open source from the OVP website www.ovpworld.org.
OVP processor models are instruction accurate and intended to be speedy so that embedded software developers, especially those building hardware-dependent software such as firmware and bare metal applications, can have a development environment available early to accelerate the software development cycle. Virtual platforms utilizing these OVP processor models can be created or the processor models can be integrated into SystemC/TLM-2.0 based virtual platforms using the TLM-2.0 interface available with all OVP processor models.
"As the semiconductor industry's trusted IP partner, Virage Logic recognizes the importance of freely available models to enable rapid growth and accelerate the design and programming of embedded systems on chip," said Simon Davidmann, president and CEO, Imperas and founding director of the OVP initiative. "Compatibility and quality of models is essential when using virtual platforms to develop software. Offering free, verified processor models means developers can get higher quality software developed faster and help close the software gap."
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