SANTA CLARA, Calif. Tools, transistors and libraries for the 90-nanometer node might be there for the taking, but design and process complexities will conspire to push out the production of these next-generation chips until 2005, a panel of experts agreed here at DesignCon.
LSI Logic, which described its 90-nm process technololgy last April, has some customers evaluating its libraries for the next process technology node but the company doesn't expect to see a ramp up for at least two more years.
"We have customers looking for 90-nanometer production in 2005 and 2006," said Ronnie Vasishta, vice president of technology product marketing at LSI Logic.
Though some companies have said they intend to tape out their first 90-nm chips this year, most of those will be early prototypes. Some limted production could start in 2004, but full production won't likely begin until 2005, said Kevin Donnelly, vice president of the network communications division at Rambus.
Mark-Eric Jones, vice president and general manager of intellectual property at MoSys, agreed, pointing out that last quarter TSMC reported only 8 percent of the chips it produced were at the 130-nanometer node, indicating that the chip industry must still digest the current technology.
All told, four out of five panelists discussing challenges at the 90-nanometer process technology node said 2005 would be the year that chips using the latest process geometry would reach full production.
If so, then the chip industry will fall behind its own roadmap spelled out in 2001. According to the International Technology Roadmap for Semiconductors, chips based on 90-nm technology are scheduled to ship in volume starting in 2004.
Indeed, Donnelly said predictions about when 90-nm will take flight have reverted to more conservative estimates made in prior years. "Ninety nanometer really ends up being where it was five years ago," he said.
Though some chip companies such as Intel will almost certainly disagree, the panelists' comments echo a growing sentiment that chip makers will be forced to shift to a new technology node ever three years rather than every two years as many have managed to do since the 1990s. Technologists at TSMC and, more recently, at Micron Technololgy are among those that have called for slower transitions.
"Going forward, the consensus of the industry is that we're moving to a three-year cycle," said Micron chief technology officer Mark Durcan, in a meeting with financial analysts last week.
Panelists here pointed out a number of reasons why 90-nanometers will be subject to delay, including pricey tools and photomasks and complexities related to power, mixed-signal IP, memory and design methodologies.
Moreover, there are a number of new problems cropping up at the 90-nm node that designers must learn to deal with, such as how to ensure that the chip is designed to produce acceptable yields. "Just as 130-nanometer was the harbinger to signal-integrity issues, 90-nanometer is the harbinger for design for manufacturability," said Ted Vucurevich, chief technology officer at Cadence Design Systems.
Taken together, these issues will raise the costs of developing these chips to no less than $10 million, panelists said. "That's not a popular number if you're talking to the people on Sandhill Road," said Jones, alluding to Silicon Valley's venture capitalist community.
The upshot is that there are going to be fewer companies that will risk moving quickly to 90-nm, which will give chip makers fewer opportunities to hone the process for high volume manufacturing.
"The use of 90-nanometers has become an issue of the cost of adoption," Vasishta said. "That means it's going to be a slower adoption than prior technologies."