HSINCHU, Taiwan --Altera Corp. and its silicon foundry, Taiwan Semiconductor Manufacturing Co., today announced samples of the industry's first 0.13-micron all-copper interconnect programmable logic device--the Apex II EP2A70, which Altera also claims is now the largest PLD on the market.
The PLD will offer data transfer rates of up to 1 gigabits per second using Altera's True-LVDS (Low-voltage differential signaling) interfaces for 36 channels and the ability to support data bandwidths up to 36 Gbits per second, according to the San Jose programmable logic supplier.
The copper interconnect layers lower electrical resistance compared to traditional aluminum/tungsten metal layers. This reduces interconnect delays up to 40% for improved performance. The 0.13-micron process shrinks the die size of Altera's Apex II programmable logic devices for potentially lower costs.
"Today's announcement caps a banner year of process technology breakthroughs for Altera and TSMC," declared Francois Gregoire, vice president of technology development at Altera in San Jose. "Earlier this year in 2001, at the 0.15-micron process step, Altera introduced the Apex 20KC family, the world's first PLD family using all layer copper interconnect. In addition, we introduced the Mercury device, the first programmable ASSP built on that same technology."
The Apex II EP2A70 is now sampling. It will be priced at be $1,200 each for high-volume quantities in the middle of 2003.