SAN JOSE -- Fairchild Semiconductor International Inc. today introduced a new dual synchronous switch-mode power supply controller, which has been developed to greatly simplify bus termination in high-speed memory systems based on double-data rate (DDR) or high-speed transceiver logic (HSTL) interfaces.
The specifications for the FAN5236 controller were defined with the guidance of system engineers at Intel Corp. and Advanced Micro Devices Inc., said Fairchild's analog and mixed-signal products group here.
Fairchild said the new PWM controller provides VDDQ core and VTT termination power for memory systems conforming to DDR-I, DDR-II, and HSTL specifications. It also provides a buffered VREF output that simplifies design of large system architectures by allowing users to easily cascade multiple devices, according to the company.
The VTT output of the FAN5236 will source and sink up to 3 A, tracking VDDQ /2 to within +/-2%, said the company. The VREF output follows VTT within +/-40mV, meeting or exceeding JEDEC standards, according to Fairchild. The device can be programmed to generate outputs over a 900 mV-to-5.5 V range, up to 6 A per channel, with independent current limiting and shutdown controls.
The FAN5236 is available in a 28-lead QSOP or TSSOP package. In 1,000-piece quantities, the controller has a U.S. price of $1.99 each.