SAN FRANCISCO -- ServerWorks Corp. today announced an optimized chip set for Intel Corp.'s Xeon processors using a new architecture supporting 3.2-gigabyte-per-second memory bandwidth--a 50% increase over an existing chip-set solution for Pentium III platforms, said the company at the Intel Developer Forum here.
The new "Grand Champion" GC-LE SystemI/O core logic chip set manages the flow of data to and from the Xeon central processor, memory, and peripheral input/ouput devices. The chip set uses twin banks of double data rate (DDR) synchronous DRAM operating in a two-way interleaved configuration to deliver data over the Xeon's 3.2-Gbyte/sec. bus, said ServerWorks, which is a subsidiary of Broadcom Corp.
"Our OEM customers will use the GC-LE in mid-range and volume two-way servers, workstations, storage platforms, and server appliances selling from $1,500 to $20,000," said Raju Vegesna, president and CEO of ServerWorks in Santa Clara, Calif. "These new GC-LE platforms offer far greater memory and I/O bandwidth than our earlier mid-range Pentium-III processor-based designs, and they enable peak performance from the latest generation of Intel Xeon processors."
The new chip set design accommodates up to eight registered PC1600 DIMMs with capacities of 128 Mbytes through 2 Gbytes each for maximum system memory of 16 Ggytes. The GC-LE can also support one-way interleaved operation in environments where customers are willing to trade off memory bandwidth for lower system cost, said the company.
ServerWorks said the chip set is the first volume SystemI/O product to support a new reliability feature called "On-Line-Spare-Memory," in which a standby on-board DIMM is called into operation if one of the on-line memory modules fails. The logic includes a 128-bit error correcting code algorithm that enhances system reliability by detecting 16-bit errors and correcting 8-bit errors. Memory-scrubbing logic detects and corrects errors before they can impact system operation, ServerWorks said.
The GC-LE chip set incorporates ServerWorks' new CSB5 South Bridge, which includes support for a 33-MHz PCI 2.2 bus, a four-port Universal Serial Bus (USB) 1.1 controller, and a dual channel ATA100 hard disk controller with native hardware and RAID 0 and RAID 1 support.
ServerWorks said the The GC-LE SystemI/O core logic chip set is now available in volume quantities. The company said its chip set will appear in more than 80 system designs. Pricing information on the chip set was not initially available from ServerWorks.