SUNNYVALE, Calif. -- MoSys Inc. today announced it has extended its collaboration with Taiwan Semiconductor Manufacturing Co. Ltd. to include the company's one-transistor SRAM cell technology in TSMC's 90-nm (0.09-micron) foundry processes.
MoSys said it has already taped-out both its 1T-SRAM cell and new 1T-SRAM-R memory macro cell with error checking and correction (ECC), optimized for TSMC's 90-nm process technology. The basic 1T-SRAM measures 0.61 micron2 and the recently introduced 1T-SRAM-R cell is 0.52 micron2, which MoSys said is about half the size of the smallest announced 90-nm SRAM announced by Intel Corp. earlier this month (see March 12 story).
The 1T-SRAM-R macro is an enhanced single-transistor SRAM cell introduced early this year by MoSys, which shrunk the size of the memory circuit while adding ECC to the design for increased manufacturing yields, chip reliability and protection against "soft errors" as feature sizes shrink (see Jan. 28 story).
Sunnyvale-based MoSys said the collaboration with TSMC will enable early availability of 1T-SRAM memory designs with densities of 1.1 mm2 per megabit.
"We have already proven our 90-nm 1T-SRAM bit cell concept at TSMC," said Mark-Eric Jones, vice president of marketing and intellectual property (IP) at MoSys. "With embedded memory representing the majority of die area on today's SoC system-on-chip designs and increasing every year, designers require the earliest availability of the best high-density embedded memory technology on advanced processes. It is the single most important enabler for their next generation SOC designs."
MoSys and Hsinchu-based TSMC have been working together to offer memory cell technology for several process generations, starting at the 0.25-micron node.
"Highly integrated designs require more embedded memory, so we are motivated to bring the smallest available CMOS memory cell into production quickly," said Genda Hu, vice president of marketing at TSMC.
TSMC--the world's largest silicon foundry--has produced SRAM-based test chips using standard six-transistor SRAM technology as part of a new process technology R&D partnership with Europe's Royal Philips Electronics N.V. and STMicroelectronics. TSMC expects to move its new 90-nm process into pilot production by the fourth quarter of 2002 (see March 5 story).