SANTA CLARA, Calif. -- Advantest Corp. announced it was collaborating with Synopsys Inc. to develop a fast, accurate failure-diagnostics system for deep-submicron system-on-chip (SoC) designs. The failure-diagnostics tools will leverage Synopsys' TetraMAX automatic test pattern generation (ATPG) technology, said Advantest.
The new tool is scheduled for formal introduction in September and will be use data communication between Advantest's T6000 series of automatic test equipment and Synopsys' ATPG tool to streamline the task of detecting failures in complex high-speed chips, said the two companies.
The partnership follows a similar alliance announced last week between Advantest and Mentor Graphics Corp., which are also collaborating to create new failure-diagnostics test solutions (see May 16 story).
"We are working closely with Synopsys to develop an SoC failure diagnostics tool that optimizes and streamlines communication between our respective SoC-focused tools," said Nick Konidaris, president and chief executive officer of Advantest America Inc., which is the U.S.-based subsidiary of the Japanese ATE supplier. The overall objective is to enable chip companies to speed the development and improve design-for-test (DFT) methodologies, as well as reduce costs, Konidaris said.
Advantest noted that today's complex SoC designs require more complex failure diagnostics capability than in previous generations to bridge the technology gap between design and production. Under the new system being developed, Advantest's SoC failure diagnostics tool will transfer data on the location of failures from the T6000 test system to TetraMAX. This will enable the TetraMAX automatic test pattern generator to utilize its failure diagnostic feature to identify the failure node, quickly pinpointing the problem, said Advantest.
The new diagnostic tool with TetraMAX support will especially effective for scan-based design, according to Advantest. The company noted that scan-based designs are the largest and most time-consuming part of any DFT methodology. By automating the failure diagnosis process, the user can reduce the turnaround time of analysis for both the design and production-test teams, said the ATE supplier.
Advantest is a member of Synopsys' in-Sync program for electronic design automation (EDA) interoperability, which will help to ensure an optimal flow between the new SoC failure diagnostics tool and the TetraMAX automatic test pattern generation system, said Karen Bartleson, director of quality and interoperability with Synopsys.
"To ensure an optimal flow between Advantest's SoC failure diagnostics tool and TetraMAX, Advantest is an active member," said Karen Bartleson, Synopsys' director of quality and interoperability. "Customers will benefit from a smooth, interoperable flow between Advantest and Synopsys tools that can help reduce their time to market," she said.
Advantest said it has implemented these failure diagnostics methods on its e-beam test system. The company said linking fault localization information and design information will enable more precise and accurate failure area and defect factors to be specified.