SAN JOSE -- MIPS Technologies Inc. announced it has licensed the company's 32-bit RISC instruction set architecture to fabless startup Fulcrum Microsystems Inc. in Calabasas Hills, Calif., which plans to use the technology to develop a high-performance clockless processor for wireline communications.
Two-year-old Fulcrum said it is leveraging its patented delay-insensitive design methodology to develop clockless system-on-chip (SoC) solutions, which will offer significant advantages in power, performance and time-to-market over traditional chips developed with synchronous VLSI design methods. The startup said it expects to deliver its first products in the first half of 2003.
Fulcrum decided to use the MIPS 32-bit processor architecture because of widespread support in the industry and its ease of integration into products, said Bob Nunn, chief executive officer of the company.
Mountain View, Calif.-based MIPS Technologies said the Fulcrum design will be the first "high-performance clockless processor." Terms of its licensing pact with Fulcrum were not released.
"Fulcrum's clockless design methodology has the potential to greatly advance large-scale chip design, particularly in the areas of performance, power consumption, and time to market," said John Bourgoin, chairman and CEO of MIPS. "Leveraging its technology, Fulcrum can bring the flexibility and programmability of high-performance microprocessors to applications where, previously, only rigid custom solutions would suffice."