TOKYO A group of leading Japanese semiconductor makers will form a joint venture that will work to standardize the process technology for 90-nanometer devices. The Japanese government has committed about $265 million to the venture, which will be located at a government financed site.
The government assigned funding last year for "design and construction work for a facility for the standardization of semiconductor device and manufacturing technologies." With this outlay, the National Institute of Advanced Industrial Science and Technology, an independent public research organization affiliated with Japan's Ministry of Economy, Trade and Industry, purchased a part of NEC Corp.'s Sagamihara fabrication facility and is preparing a pilot line there for 90-nm process verification.
Fujitsu Ltd., Hitachi Ltd., Matsushita Electric Industrial Co. Ltd., Mitsubishi Electric Corp. and NEC will form the joint venture and use the facility in cooperation with the Semiconductor Technology Academic Research Center (Starc) consortium.
Starc proposed a standard last August for 100-nm system-on-chip designs, specifying common design rules, IP libraries and other parameters. The new joint venture will use that standard as a basis for its work on 90-nm technology.
Other leading semiconductor companies are working together to develop 90-nm process technology. The trio of Motorola Inc., Philips Semiconductors and STMicroelectronics is working with Taiwan Semiconductor Manufacturing Co. (TSMC) to develop a common 90-nm process, and separately TSMC is also working with LSI Logic Corp. on 90-nm technology. Last week, Agere Systems Inc. said it would also use TSMC's technology as a basis for its 90-nm process.
By integrating their design and process technologies for the 90-nm node, the participants in the Japan-based joint venture expect to reinforce the competitiveness of Japan's semiconductor industry.
The joint venture will be officially announced on Thursday, July 11, and will begin operation on July 18.