TOKYO Toshiba Corp. will offer its 130-nanometer copper process line to third-party customers on a foundry basis, and says the process has achieved the highest yield rate among the competitors within this generation of manufacturing technology.
Toshiba intends to use the process for various products of its own, such as the MIPS-based TX series of microprocessors and its configurable MeP processors. But to raise the utilization rate, it is actively lobbying for outside customers. "Customers are not necessarily satisfied with present foundries' 130-nm processes," said Tsutomu Koyanagi, technology executive at Toshiba, referring to the frustrations the chip industry has encountered in migrating to the 0.13-micron node. "So we are going to offer our 130-nm copper process using dual damascene to others."
"The yield rate is still very high, comparable to our 0.18-micron process," said Masakazu Kakumu, general manager of Toshiba Semiconductor Co. The process is capable of integrating DRAMs and analog blocks "on a system-on-chip device at a high yield rate," he said. "IBM has already established such a process and we are probably the next. We can offer products using the process with a stable, high yield rate at an attractive price."
Toshiba's 130-nm technology employs eight metal layers and has a standard gate length of 110 nm. DRAM macros for 4, 8, 16 and 32 Mbits are available, and multiple DRAMs can be embedded on one chip. A 6T SRAM cell measuring 2.48 square microns is also available. Copper wiring combined with dual-damascene technology makes for a minimum wiring pitch of 0.34 micron, the company said.
In the trench-structure DRAMs Toshiba has been producing, the process for embedding memory is completed before the logic-device process begins. Thus, logic transistors won't deteriorate in the high-temperature process that's used to build the DRAM cells, and the wiring process can be the same as that of pure-logic devices. The structure is a big advantage that competitors do not share, said Toshiba.
Though Toshiba is a latecomer to the 130-nm process race, Kakumu emphasized the company's track record in rapid technology ramps, exemplified by its glitch-free experience bringing up the Emotion Engine for Sony's Playstation 2 machine.
For yield improvements, Toshiba has been working with PDF Solutions Inc. since 1997, from the 0.25-micron generation, and says the collaboration contributed to the smooth Emotion Engine production ramp. For the 130-nm process, Novellus Systems Inc. also collaborated on the copper-wiring process.
Toshiba is establishing a 90-nm copper process technology with Sony Corp. as an extension of the 130-nm process and plans to prepare volume 90-nm production at its Ohita plant by the end of this year.