LONDON -- Strontium titanate, a relatively well-known perovskite material, could be the dark horse to come through and provide a replacement high-k gate dielectric material at sub-25-nanometer process technology nodes, according to a late paper at this year's International Electron Device Meeting (IEDM) to be held December 8 to 11 in San Francisco.
Sanghun Jeon of the Kwangju Institute of Science and Technology (Gwangju, Korea) has spent time at Oak Ridge National Laboratory (Oak Ridge, Tenn.) with Rodney McKee and Frederick Walker, and is the first-named author a on study of epitaxial strontium titanate for MOS gate dielectric applications.
Technology planners have said that by the end of this decade the semiconductor industry should be producing 25-nm MOSFETs with effective oxide thicknesses (EOTs) of five to eight angstroms (0.5 to 0.8 nanometers). But so far materials that provide the necessary insulation at this atomic scale, together with necessary reliability and manufacturability, have yet to be discovered.
The high-k gate stack challenge is relatively urgent and for imminent process nodes some combination of the oxides, or oxynitrides, of hafnium and zirconium, perhaps with a dash of lanthanum thrown in, has been the favorite as a replacement for silicon dioxide as the insulator between gate and channel in a conventional planar transistor. Indeed numerous papers have been written and presented at several IEDM conferences as researchers have tried to home in on the optimum recipe and assembly technique.
Jeon and his co-authors point out that such materials require relatively thick interfacial layers of silicon oxide and that, in combination with a k=value of only 10 to 20, such a system makes scaling to EOTs of less than 10 angstrom difficult.
This paper reports on the electrical characteristics of thin films of strontium titanate with an EOT well below 10 angstrom, at 5.4 angstrom and with a leakage current of 0.7 milliamp per square centimetre.
Interestingly to minimize leakage current it was necessary to build an interfacial layer of barium strontium oxide prior to laying down the strontium titanate by molecular beam epitaxy.
In their IEDM paper the authors say that although further process optimization is necessary, epitaxial strontium titanate "shows promise" for future gate dielectric applications.