AGOURA HILLS, Calif. Making a more aggressive push into the wafer-probe space, Teradyne Inc. has unveiled a memory test system with an architecture specifically designed for high-parallel test and repair of DRAM wafers.
"In DRAM wafer probing, the industry is on the threshold of major change," said Harold Labonte, marketing manager for Teradyne's Memory Test Division. "Low-speed package test system architectures and undersized SRAM-based cache RAMs constrain the test strategies of DRAM manufacturers at probe."
Because growing array sizes, complex redundancy and the need to collect more data are driving up the cost of testing, there was a need for an architecture specifically designed for probe, the company said.
In the world of package test, pin counts are fixed by Jedec, parallelism is bound by handler restrictions, speed of test is dictated by the application and yields are high.
By contrast, the world of probe test makes different demands on a test system. The number of pads per die varies, with the trend moving toward fewer pads. Parallelism is a function of the tester and probe cards, speeds are set by the test strategy of the manufacturer and yields are nearly zero. Unlike package test, data collection while testing is essential.
The Fklex-Die architecture of Teradyne's Probe-One Memory Test System seeks to deliver the maximum parallelism per wafer, while it features the ability to scale. The system can be configured in speeds of 62, 125 or 250 MHz, with dual 3-D cache RAM ranging in size from 6 to 384 gigabits, and with 64 to 512 SiARA-II redundancy processors.
Teradyne has been working with a range of prober, probe-card and probe-card-metrology tool suppliers for more than two years to develop a "new interface for highly parallel wafer probe for high-volume DRAM and other memory devices," said interface design manager Simon Longson.
"The goal of these joint developments was to establish a reliable contact over an area as large as one-quarter of a 300-mm wafer, with a bandwidth to support speeds up to 250 MHz," Longson said.
To achieve that, he said, the company suspended the interface over the prober, exerting no force on the prober head plate. A topside stiffener, with a hard stop and integral latching mechanism, prevents any further flexing of the probe card.
Teradyne claims to have over $15 million in system orders, most of which originate in Asia. Shipments are pegged to start in May, with pricing starting under $2 million.