KYOTO, Japan Researchers at IBM Microelectronics believe the low-power, 130-nanometer silicon-on-insulator (SOI) technology IBM unveiled at the recent VLSI Technology Symposium may prove superior to its silicon germanium technology.
The company has developed two spins of this technology platform for digital and RF applications. A low-voltage version for logic and SRAM works in the 0.6- to 1.2-V range, while a higher-performance version works at up to 1.5 V. As a demonstration vehicle, IBM has tested a 2.6-micron-square six-transistor SRAM cell using the technology, said Richard Wachnik, a senior manager of IBM Microelectronics' technology integration division.
The dual-gate-oxide technology platform uses eight levels of interconnects built in copper with low-k dielectric materials, and newly developed inductors. Moreover, silicon-on-insulator "just performs better than bulk CMOS," said Wachnik.
RF functions on the 130-nm (0.13-micron) SOI CMOS outperform digital RF on bulk CMOS by a significant margin, IBM said. The SOI CMOS has a cutoff frequency of 145 GHz, 45 GHz better than IBM's CMOS process. While the more exotic indium phosphide process yields better analog performance, it is incapable of supporting low-power digital at very large-scale integration, Wachnik said.
The SOI-CMOS technology also includes record high-Q inductors; high-Q varactors, resistors and MOS; and metal-insulator-metal capacitors that offer a "unique set of devices and performances," said Wachnik. "The issue here is that when you combine all the recent advances such as copper and low-k and SOI and put them together, they enable you to produce superior low-power RF technology."
Moving SOI research into RF applications could lead to more highly integrated devices and superior passives, said Wachnik. The technology also has the potential to better solve the longstanding wireless and communication integration problems.
"Once upon a time SOI was an exotic compound," said Wachnik. "We already had silicon germanium. Now, here is an alternative. SOI will allow us to combine and solve the RF applications and attach the digital."
So far, IBM has run multiple tests for developing design information and plans to develop other types of cells for RF applications. Wachnik said IBM could put the technology into limited use "in a year or two."
However, the newness of the combination means there is no design infrastructure to take the technology out of the lab, he said. "Currently we lack the design tools. We have to build the design tools around the technology. It will take relationship building to do this, and right now we are gathering people."
But IBM can move the technology to the 0.1-micron node "soon," he claimed. "There is not going to be a huge effort needed to make this manufacturable," said Wachnik.
That IBM can successfully move SOI into digital and RF is further proof of how trouble-free scaling SOI-plus-copper technology into new applications has become, he said.
"Copper is easy to make and so is SOI, really," Wachnik said. "Those that back SOI technology Motorola, AMD, Compaq and so on they all constitute evidence of market acceptance of this fact." IBM continues to pour considerable resources into SiGe technology, which offers comparable performance but is more resistant to integration, he said.