SANTA CLARA, Calif. -- Advantest Corp. today rolled out a new front-end flash memory test system, which has the ability to test up to 128 devices simultaneously. The throughput of the T5771 tester is an eightfold increase compared to the company's previously available system, said Advantest.
The new system is capable of testing flash memories at up to 100-MHz data rate with an overall timing accuracy of +/- 0.5 ns. Advantest said it plans to display the T5771 tester for the first time at the Semicon West trade show in San Jose, which starts July 18.
Advantest said it has designed the T5771 tester to deal with the increase in flash memory data rates and higher chip bit densities. A proprietary test array architecture is used to leverage two test stations in the new system for simultaneous testing of up to 128 flash memories. The new system also has the ability to test or mask defective blocks in the memory on a block-by-block basis, which results in higher test throughput, according to the Japanese-based automatic test equipment (ATE) supplier.
In addition, the T5771 tester incorporates an improved flash match circuitry that reduces programming overhead by one half compared to the preceding system, said the company, which recently created the Advantest Test Engineering Corp. subsidiary in Santa Clara.
Highly integrated ASICs and multi-chip modules have been used in the new ATE system to boost parallel testing by four times. The increased integration inside the system and simultaneous testing capacity will lowered the cost of flash testing by one-third per device compared to the previous-generation tester, said the company.
Shipments of the T5771 are scheduled to begin by the end of June. Production configurations of the system will start at a price of about $1 million, said Advantest.