SUNNYVALE, Calif. -- Synplicity Inc. here figures it is doing something rather unusual with its entry into the ASIC synthesis market. Instead of focusing strictly on leading-edge designs, the company is emphasizing productivity and mainstream ASICs, which are produced with 0.35- to 0.18-micron processes.
"No one has ever entered the synthesis market with something other than the 'bleeding-edge' tool," said John Gallagher, director of product marketing for ASIC systems at Synplicity.
The Sunnyvale company--which has established itself in the 1990s in synthesis tools for field programmable gate arrays (FPGAs)-- is now aiming its new Synplify ASIC software package at reversing the design productivity gap that has widen in the past 10 years, Gallagher said. Citing data from EDA analysts at Collett International, the company said design costs for application-specific ICs have exploded to $33 billion worldwide compared to $17 billion of ASICs sold in 2000. In 1990, the industry spent just $3 billion on design costs for $5.5 billion in ASICs.
"We think this is an alarming trend," Gallagher said. "In the past 10 years, silicon procurement of ASICs by system houses has grown three times but the cost of designing those chips has increased 10 times."
About 80% of today's design costs can now be linked to engineering time and resources vs. tool purchases and overhead issues, according to Gallagher.
To tackle the productivity problem, six-year-old Synplicity has decided to leverage its FPGA synthesis and ASIC verification software in a new design automation package for application-specific ICs. A new timing engine was developed for ASICs, and a Behavior Extracting Synthesis Technology (BEST) was created to apply attributes of a design to the software. The software feature runtimes up to 15 time faster than traditional synthesis products with higher quality results, according to the company.
"This is only the starting point, and we believe we have a roadmap to allow us additional improvements of two to three times that in the next couple releases," Gallagher. The BEST technology enables the Synplify's ASIC synthesis programs to be highly optimized for chip area and performance targets, he said.
The Synplify ASIC list price is $115,000 for worldwide access. A one-year time-based license cost $69,000. Synplicity's existing FPGA synthesis and ASIC verification customers are being offered a 50% discount in 2001.
A key benefit to the ASIC synthesis package is that it generates source code that can be used for FPGA prototyping of designs without changes to the RTL code, said Gallagher.