SAN MATEO, Calif. A PCI standards organization decided Friday (July 27) to delay a vote on support for a next-generation I/O scheme backed by Intel Corp. until Aug. 3, saying it needed more time to review the spec.
Members of the PCI Special Interest Group were expected to vote on the 3GIO chip-to-chip interconnect scheme on Friday, but are "allowing more time to review the proposals they were given," a PCI SIG spokesman said. "They're conducting due diligence."
The decision to postpone the vote was made on the same day that several new members were elected to the PCI SIG board, which is populated by representatives from nine companies. The new members will be identified Monday (July 30) on the PCI SIG Web site.
Though the decision regarding the endorsement of the 3GIO has been postponed, the PCI SIG has expressed a need for a new interconnect. "They realize there's a need for an interconnect I/O that has the scaleability and cost/performance of something like 3GIO," the group's spokesman said. "They're in support of a concept like that."
Several companies are working with Intel to define the 3GIO spec, according to Intel, which has declined to name them and has to date revealed little about 3GIO itself.
Intel officials said they are not in a position to speak about 3GIO on behalf of the group, and that its non-disclosure policy is consistent with its practices in the early days of previous standards it has spearheaded, such as PCI.
What is known about 3GIO is that it will be a point-to-point serial interface that can be scaled beyond 10 GHz. Intel chose a serial interface because it says parallel interfaces are running out of headroom. "The end game is getting the best efficiency out of the pins in terms of performance and cost," said Bala Cadambi, program manager for 3GIO at Intel.
This contrasts with a rival interconnect spec from Advanced Micro Devices Inc. called Hypertransport, which is based on low-voltage differential signaling (LVDS) and can be scaled up to 32-bits in both directions. In its widest configuration, Hypertransport can support an aggregate bandwidth of 12.8 gigabytes per second, according to the Hypertransport consortium.
Some companies have started shipping Hypertransport products this year, and AMD intends to introduce devices with the new interconnect scheme in 2002, according to the Hypertransport group. Intel said it expects 3GIO products will be needed in 2003.