SAN MATEO, Calif. Altera Corp. and Xilinx Inc. may soon be looking over their shoulders at Lattice Semiconductor Corp., which is planning to join the FPGA fray sometime next year. The company's newly appointed president Steven Laub called FPGAs "a natural extension for us, both customerwise and technologywise." Though a daring move, Lattice has already proven its ability to make a solid business out of its complex-PLD line even in the worst of times.
While CPLDs are known for their deterministic timing and are used most commonly for control logic, FPGAs have higher logic density and are more suitable for the data plane. Most of Lattice's customers already use a mixture of both types of programmable logic on their circuit boards, Laub said in an interview with EE Times.
Lattice is keeping its FPGA architectural details and product plans under wraps for now. Even so, patent filings indicate the company has been working on a homegrown FPGA technology for about five years.
Lattice has developed an FPGA architecture made up of so-called "variable-grain blocks," according to public patent filings. Each block includes user-programmable lookup tables (LUTs), the most common building block for FPGAs.
These variable-grain blocks are themselves composed of several synthesizing layers that take function signals and fold them together, layer after layer, to create more-complex functions. This includes an L-shaped "spawning layer" with configurable building blocks, a "signal-acquiring layer" that draws in input terms for the LUTs and controls and a "decoding layer" sandwiched between them for strapping and intercept functions, according to one patent filing.
At a higher level, these blocks can be arranged in a larger matrix pattern or super-variable-grain blocks with common long-line drivers that can be accessed by each constituent block. Subsequent patents granted to Lattice cover the integration of SRAM memory blocks and programmable input/output blocks into the variable-grain block architecture.
Whatever form Lattice's FPGA takes, it will be sure to draw the attention of Altera and Xilinx, both vigilant guardians of their programmable logic technology. Only last spring did these two rivals settle their eight-year battle over intellectual property infringement.
Laub said Lattice has taken pains to ensure the uniqueness of its FPGA technology, signing a technology cross-licensing agreement with Altera earlier this year that ended earlier patent disputes. Laub also hinted that a deal with Xilinx is in the works. "We'll have more information regarding Xilinx," Laub said.
Being armed with an architecture and with cross-licensing agreements would give the company a start, but Lattice also has to prepare for a technology arms race. Altera and Xilinx spent $40 million and $46 million respectively on R&D last quarter to build up their arsenal of architectures, software tools, intellectual property, embedded microprocessors and manufacturing expertise. Lattice spent about $18 million last quarter on R&D.
Despite its smaller size, Lattice has has made a name for itself as the leader in in-system programmable CPLDs. Laub believes it has caught up with Altera in market share for this segment of the programmable logic market.
And despite the comm market's implosion, Lattice has kept its head above water. So far it has avoided large inventory write-downs and layoffs and managed to eke out a 12 percent operating profit last quarter despite a steep decline in revenue.