NANTES, France--Atmel Corp. here today announced new 0.25- and 0.35-micron embedded memory blocks for its Ultimate Logic Conversion products, which will enable users of field-programmable gate arrays (FPGAs) and complex programmable logic devices (CPLDs) to move their designs to lower cost ULC-configured devices.
Atmel said the 0.35-micron conversion matrices will handle up to 400 kilobits of dual-port RAM and 780,000 gates of ASIC logic in a single chip. The 0.25-micron matrices will support up to 1,500 Kbits of dual-port RAM and 1.8 million gates of ASIC functions, which Atmel said was equivalent to "7,000-K gates" of FPGA.
The company said the ULC internal frequency rates can run much faster than conventional FPGAs. By inserting standby periods, power consumption can also be reduced by about 90% compared to FPGAs, said Atmel managers in Nantes.
"Key industry players, using FPGAs and CPLDs to reduce development cycle time, have a lot of pressure from the marketplace to reduce costs," said Gerard Bouvet, marketing manager for ULC at Atmel. He said Atmel's FPGA/CPLD conversions have "benefited many companies from different market segments, including telecom, data communication, multi-media, industrial and automotive."
Atmel said its ULC blocks are 100% compatible with embedded memory blocks from Xilinx Inc. and Altera Corp. Both synchronous and asynchronous dual-port RAM are supported.
According to the San Jose-based company, ULCs can significantly reduce the die size requirements and lower costs by up to 80% compared to large FPGAs. Based on 0.35-micron technology, an FPGA with 98-Kbit dual-port RAM and 200-K gates of logic is about 252 mm2, said Atmel. The equivalent ULC is only 104 mm2, the company said.
The 0.35-micron matrices are available now for designs, and the 0.25-micron series will be available in the beginning of 2002, Atmel said.