NORWOOD, Mass. -- Analog Devices Inc. here has jointly developed a reference design kit with Virata Corp. for the rapid deployment of asymmetric digital subscribers line (ADSL) devices.
The kit is a complete system solution for manufacturers of external ADSL customer premises equipment (CPE), including modems, gateways and routers. The solution will consist of ADI's AD20msp930 ADSL chip set, and Virata's Helium communications processor and networking software. Availability is set for April.
"Analog Devices joined forces with Virata in order to expedite the deployment of ADSL," said Mike Ziehl, Analog Devices' director of broadband marketing. "This kit provides a complete system solution for CPE equipment manufacturers and makes their design challenge easier by offering time-to-market and performance advantages as well as flexibility and widespread interoperability."
The reference design kit features ADI's AD20msp930 chipset solution. The AD20msp930 enables up to 10 megabits per second of Internet data throughput per subscriber line, which is more than 100 times faster than 56-Kbit/s analog modems. This chip set includes a new high-performance analog front end (AFE), and ADI's low-power line driver.
The new reference design supports both the full-rate ADSL and G. Lite (G.992.1 and G.992.2, respectively) and comes in Ethernet and USB versions. In addition, the reference design offers interoperability with central office equipment based on Analog Devices' ADSL chips. The kit includes the hardware platform with schematics, physical layer discrete multi-tone (DMT) chip set, and ATM, IP and PC driver software, and is supported by both ADI and Virata, based in Santa Clara, Calif.
For its network processing and controller capabilities, the reference design uses Virata's Helium chip, a highly integrated communications processor combining an ATM engine, IP processing, Ethernet and USB interfaces with control of DSL physical-layer chips such as the AD20msp930.Virata is also providing the network processing software for the design, which includes bridging, routing, and tunneling functions in addition to the core ATM processing capability