SAN FRANCISCO ( ChipWire) -- Receiving data and images on a device resembling a Dick Tracy wristwatch will require major advances in radio-frequency IC processes and architectures, according to ISSCC keynoter Guenter Weinberger, vice president of the wireless division at Infineon Technologies AG in Munich.
Cellular telephones will become the "Swiss army knife" of third-generation (3G) wireless technology, that is, advances in wireless technology will start "piggybacking" on cell phones -- already at 500 million units worldwide, Weinberger told an audience of 2,500 circuit design engineers at the International Solid State Circuits Conference in San Francisco on Monday.
Cellular telephony will undoubtedly be the largest consumer of new-generation wireless services including broadcast radio, digital television, GPS and navigation systems, still and moving pictures (using MPEG encoding), color displays and voice recognition (as well as voice-over-IP). But incorporating data and images into next-generation cellular handsets will require major technology advances to increase bandwidth and to reduce size and power consumption. While wireline technologies like ADSL will transmit disjointed images at 6 or 8 Mbits/s, 3G wireless services propose to transmit useful data at 2-Mbits/s rates.
System-on-chip integration is expected to play a major role in accommodating the antennas, PIN diode switches, filter components and power amplifier transistors currently used to build an RF front end. An 8 x 10 mm2 multi-layer LTCC module low-temperature co-fired ceramic that Infineon currently builds for GSM phones, for example, includes 27 passive components, and seven active devices including PIN diodes, HBTs, CMOS FETs, bipolar ICs and GaAs MESFET transistors. Converting this module -- in its current topology -- to a single bipolar or even BiCMOS IC would create an enormous power drain. "The power amplifier would run your battery empty," Weinberger said.
RF CMOS, whose transistors have 80-GHz fTs using 0.12-micron geometries, is seen as a better platform for integration that SiGe, whose fTs are only 50-70 GHz. But such a process must include not just RF transistors, but also mixed-signal components such as variable capacitors and spiral inductors.
The Semiconductor Industry Association (SIA) roadmap suggested that much of these components -- including MEMS mechanical resonators -- can be incorporated onto a single RF CMOS chip. But the incorporation of these tank circuits (the dozens of passive component-based RF tuning networks) onto a single chip would increase leakage currents (IDDQ) and overall power consumption. The future for wireless transceiver integration looks bright, said Weinberger. "But when does this future start?" he asked.
Part of the challenge would be in devising new architectures to support single-chip wireless transceivers, Weinberger said. He advocated replacing the three-stage "double-conversion" architecture currently utilized for super heterodyne receivers to a direct conversion architecture. "Many external components would be eliminated in the process," he said. But the challenge to building zero IF (intermediate frequency) receivers would be RF A/D converters that would capture large swaths of the RF band, and use digital signal processors to segregate I and Q components of the captured signal.
Weinberger suggested that in the foreseeable future cell phones will likely have five chips: an RF transmitter, RF receiver, IF section, a digital baseband processor, and an integrated power controller.