SAN JOSE--Cypress Semiconductor Corp. today said it has produced the first working devices with a new 0.25-micron BiCMOS process developed for next-generation communications ICs, such as fast physical layer devices, high-performance clock buffers, and wireless chips for high-frequency RF applications.
The 3.3-volt BiCMOS technology supports transistor frequencies greater than 30 GHz and adds five masks layers to Cypress' existing 0.25-micron CMOS process. According to the San Jose company, the new process technology was developed for the optimal combination of speed, power, and cost in competitive communication chip segments.
"Cypress aims to leverage it to create reusable IP blocks for future generations of high-performance communications products," said Paul Keswick, vice president of new product development at Cypress.
Cypress said the first products to be fabricated with the BiCMOS technology will include a high-performance transceiver for wide area networks, a high-speed programmable-skew clock buffer, and a radio-frequency phase-locked loop that supports frequency outputs up to 2.5 GHz.