SANTA CLARA, Calif.--During the SPIE Microlithography Symposium here, Avant! Corp. rolled out a new verification tool that uses simulation to check the implementation of phase-shifting and optical proximity correction (OPC) elements on advanced photomasks for in 0.1-micron processes.
"In the past, designs could be taped out directly after physical design verification," noted Gerald C. Hsu, chairman, president and CEO of Avant!, based in Fremont, Calif. "Since PSM phase-shifting masks and OPC are performed after physical design verification, the only robust way to verify PSM and OPC mask layouts before tape-out is through simulation of the silicon patterns.
"Lithography verification identifies potential manufacturing issues so that they can be corrected to prevent costly iterations between manufacturing and design," he added.
The new photomask verification tool is used after phase-shifting and OPC elements are generated to assure that reticles match the original intent of the chip design. This verification step will help to improve yields in next-generation wafer processes, said the Fremont design automation supplier.