MOUNTAIN VIEW, Calif. -- NetLogic Microsystems Inc. here has announced a networkingchip for high-speed, flexible policy-based packet address management.
The NetLogic Policy Co-Processor family offers sophisticated policy-address classification that frees networking equipment processor resources to enable higher levels of traffic
throughput and speed, the company said. The chip's architecture improves the ability of network equipment to direct packets with additional levels of priorities based on policy management parameters and differentiated services, such as quality of service (QoS) and type of service (ToS).
Packet classification, enhanced by NetLogic's Policy Co-Processor devices, also gives network users control over authentication, and is ideal for security firewalls and virtual private networks (VPNs).
NetLogic's NL76733 and NL75833, the first two members of the new Policy Co-Processors family, provide wide policy word size of 144 bits and 288 bits, respectively, and a large policy address table size of 16K and 8K words, respectively. Entry capacity can be increased up to 128K entries with NetLogic's eight-device Policy Co-Processor module. Devices can also be easily cascaded to other capacities by the user.
Both products, to be available in 50- and 66-MHz versions, are designed for routers and
switches used in Internet core, Internet edge, campus, enterprise, and Internet service provider (ISP) point-of-presence (PoP) environments.
TJ Mueller, vice president of marketing at NetLogic, claimed the Policy Co-Processor architecture represented a breakthbrough for highly configurable, large-capacity packet classification functionality. The patent-pending architecture utilizes many of the features of NetLogic's ternary IPCAM product technology. Using this ternary CAM technology, the Policy Co-Processor can compare "0", "1" or "don't care" values with a "mask per bit" granularity for reacting to a variety of packet types and QoS parameters.
"No other search engine solution provides the high level of table management flexibility, entry capacity, search speed and seamless cascading capabilities for optimizing policy-based networking," Mueller said.
NetLogic designed the Policy Co-Processor to be highly configurable for flexible network management. Customers can configure individual policy words through numerous user-defined fields thus determining which policies to enforce.
The architecture of the Policy Co-Processor actively manages the policy entries such that new entries can be "bubble" inserted or deleted at clock speed based on their corresponding priorities. This bubble feature eliminates the performance loss, extra silicon and software development required when using external entry processing. The device also offers the ability to explicitly assign a priority value to a specific entry. Regardless of an entry's priority modification, its link to external associated data, or pointer, remains the same.
In the past, router designers have relied on software-based hashing, such as trie or binary search algorithm techniques, for policy-based routing. Hashing techniques significantly impact network performance by adding unnecessary overhead, complication, and search delays. These techniques perform in the 1-5 million searches-per-second range, not accounting for the impact of table update overhead. In contrast, the Policy Co-Processor classifies packets that are 144 bits wide at a sustained rate of 33 million searches per second and eliminates table maintenance overhead.
To streamline the internal processes of networking equipment, the Policy Co-Processor offers the next free address (NFA) bus, which "advertises" the location of the Policy Co-Processor's next available address so that off-chip, associated data can be maintained at wire speed. The NFA feature
allows the user to update the off-chip, associated data in an efficient and timely manner.
NetLogic's 0.18-micron NL76733 and NL75833 devices can be clocked at speeds of up to 66 MHz. The Policy Co-Processors also support both route and rule aggregation through each device's masking capabilities allowing the user to efficiently represent consecutive ranges of table values with a single entry combined with its local mask word. This ability to accommodate both aggregated and exact address table values reduces chip count by more efficiently storing route and rule information.
Zuma Networks, a leading high-speed networking provider based in Chatsworth, Calif., has endorsed NetLogic's Policy Co-Processor architecture for future use in its advanced products to enhance network infrastructures for enterprise and telecommunications carrier customers.
"CAMs have become a crucial part of networking equipment design at Zuma Networks," said Ofer Iny, vice president of engineering at Zuma Networks. "NetLogic's Policy Co-Processor is the ultimate CAM because it makes address table management much easier for designers. With this advanced silicon search engine, we will be able to offer far more flexible networking solutions for our customers."
Sampling of the NL76733 (16K x 144) Policy Co-Processor is scheduled for July, with volume production scheduled for the fourth quarter. The 50-MHz version will be priced at $69 and the 66-MHz version will be priced at $79 in 10,000-unit quantities. The device will be available in a plastic BGA package.