SANTA CLARA, Calif.--Tensilica Inc. here today announced it has licensed its Xtensa processor core to the University of California at Berkeley's Wireless Research Center, which will use the technology in its Two-Chip Intercom (TCI) project. The center plans to develop an architectural implementation methodology that will eventually lead to a single-chip ultra-low power radio, known as PicoNode.
According to professor Jan M. Rabaey, co-director of the center, said the Tensilica intellectual property (IP) and processor generator provide the flexibility and power management capability required in next-generation wireless applications.
The wireless research center said its design methodology is based on multiple levels of abstraction and communication refinement in a top-down approach. The TCI system architecture will comprise of an embedded Xtensa microprocessor core, FPGA-based reconfigurable logic and a dedicated baseband processing network bus architecture on one IC, which communicate with a radio-frequency (RF) frontend function on a second chip.
The top layers of the protocol stack are mapped onto the processor with the lower layers mapped onto reconfigurable hardware and dedicated logic, said the center. The processor chip design is slated to be taped out for production during this summer.