BEAVERTON, Ore. -- Integrated Measurement Systems Inc. here today announced that Agilent Technologies Inc. has purchased a complete virtual-test tool set from IMS for each of its application development centers.
This move will allow Agilent, the former semiconductor and test-equipment business of Hewlett-Packard Co., to help customers save time in chip development--particularly with system-on-chip (SoC) devices--by generating chip production test programs before silicon, according to IMS's Virtual Test Division.
"Agilent understands that we can save time in getting a customer's test program up and running before tapeout," said Bob Harrison, Channel Development Director IMS Virtual Test Division at IMS's Virtual Test Division. "By doing this before silicon, they can reduce test costs by 50-80%."
IMS's Virtual Test methodology uses EDA-style simulation to separate the hardware from software, Harrison explained. "We use software to model the hardware," he said. IMS's Virtual Test toolset includes Digital Virtual Tester, TestDirect, and TurboBridge, and under the agreement models the Agilent 93000 and 83000 SoC digital and mixed-signal test machines.
IMS already supports Agilent's 94000 mixed-signal test system and the Vesatest memory test system, Harrison said. "They had wanted to start with SoC because that's where the biggest design issues are," he added.
Added Jon Weatherly, manager of Agilent's Development Center in Palo Alto, Calif., "Supplying each of our application development centers with IMS's complete suite of virtual test tools will help Agilent improve customers' ramp-up times for the 93000 SoC series testers, saving them time and money."
Harrison emphasized that the virtual test methodology "doesn't replace the tester." IMS's Digital VirtualTester creates a simulation of the test equipment itself, which can be used during the chip-design process to initiate test development, which typically reduces debug times by half or more, according to IMS's Harrison. TestDirect, an advanced pattern-generation program, automatically generates ATE patterns from the designer's original simulation environment.
TestDirect plus TurboBridge allows the test engineer to leverage the IC designer's work by building the test database from the design database while preserving the design intent. Harrison said this is like giving design and test engineers "a virtual ATE on their desktop."
Chip makers such as Motorola, Texas Instruments and IBM "see this as a design issue," said Harrison. "They can save a whole design spin. TI says delays in ramping a chip's production due to test can cost $2 million a month."