AUSTIN, Tex. -- International Sematech here and the IMEC research center in Belgium have struck a joint R&D agreement to develop a new gate-stack process for 0.10-micron design rules in transistors.
Sematech today said the unprecedented partnership with IMEC is part of its efforts to accelerate chip technology by as much as two years ahead of the industry's international roadmap. The joint development effort will be aimed at one of the most difficult challenges in shrinking IC feature sizes--coming up with a viable thin-film replacement for silicon dioxide, which has been used in MOS transistor gates for nearly four decades.
The R&D pact is also a significant move for Sematech. The Austin-based consortium was originally formed in the 1980s to help strengthen U.S. chip-making capabilities, but in recent years it has been branching out to involve research organization worldwide. In 1998, Sematech launched an international subsidiary to include non-U.S. chip makers in some of its programs, and then one year later, it reorganized itself as International Sematech (see June 17 story). In the past year, Sematech has been pursuing more cooperation with international research organizations and consortia.
"By sharing costs and the risks on this project, we will help International Sematech members reach their goals," said Gilbert Declerck, president and chief executive officer at IMEC. "This collaboration is a great example of global cooperation aimed at overcoming one of the major roadblocks of the ITRS roadmap," he said, referring to the International Technology Roadmap for Semiconductors produced by the Semiconductor Industry Association (SIA).
Under the three-and-a-half year cooperative program, Sematech and IMEC will work together to develop effective equipment, materials and processes for gate stacks in 0.10-micron (100-nm) and smaller devices, said officials with the two organizations. The primary areas of activity will focus on:
Processes for depositing high-k dielectric materials, including interface preparation, deposition using atomic layer chemical vapor deposition (ALCVD), and alternative deposition techniques;Physical and chemical characterization of deposited dielectrics;
Characterization of electrical properties and defects;
Reliability of gate stack structures;
Electrode materials and transistor structures;
Dry-etch process development;
Interface engineering and contamination control
Sematech and IEM said the project will focus 50% of its activity on advanced gate stack material deposition steps, 30% on electrical/reliability characterization, and the rest on replacement transistor gate development for materials characterization, contamination control, and environmental, health and safety. Under the program, IMEC will provide its expertise in reliability, materials understanding and process integration. "These skills, combined with the expertise of International Sematech, provide a solid base for development of alternative gate stacks," said Marc Heyns, director of IMEC's high-k program.
To take full advantage of the reduced design rules targeted in the international technology roadmap, the semiconductor industry must move to thinner gate dielectrics for sub-70 nm (0.07-micron) devices. This means silicon dioxide will have to be replaced after nearly 40 years of use in MOS transistors.
"This major, non-incremental change in industry direction requires us to decide on the best materials to use and to gain worldwide consensus for these new materials to insure that we have ideal process equipment for manufacturing," said Mark Melliar-Smith, president and CEO of Sematech.
Sematech re-emphasized that it will continue to work the U.S. Semiconductor Research Corp. and American universities on fundamental research as well as with equipment suppliers from around the world.
"We are reaching out to international centers of excellence so that our member companies will achieve their goals," said Mike Jackson, director Sematech's Front End Processes program. Sematech chief operating officer Rinn Cleavelin added that the partnership with IMEC will enable the two organizations to take advantage of "the best each of us has to offer without duplicating the other's work."